GPIO Library
GPIO library includes a set of routines for easier handling of the General Purpose Input/Output (GPIO) pin functions.
All MCUs, except x00 family, provide a layer of protection against accidental programming of critical hardware peripherals. Protection is currently provided for the NMI pin (PB7) and the four JTAG/SWD pins (PC[3:0]).
Therefore these pins need to be unlocked before their function can be changed.
Caution : It is possible to create a software sequence that prevents the debugger from connecting to the Stellaris® microcontroller.
If the program code loaded into flash immediately changes the JTAG pins to their GPIO functionality, the debugger may not have enough time to connect and halt the controller before the JTAG pin functionality switches.
As a result, the debugger may be locked out of the part. This issue can be avoided with a software routine that restores JTAG functionality based on an external or software trigger.
Or, if possible, by simply adding few seconds delay at the beginning of your code.
Important :
- The predefined General Purpose Input/Output (GPIO) constants used by the library routines are stored in the separate source file.
Library Routines
GPIO_Clk_Enable
| Prototype |
void GPIO_Clk_Enable(unsigned long *port);
|
| Description |
This routine enables clock on the desired port.
|
| Parameters |
port: desired port on which the clock will be enabled.
|
| Returns |
Nothing.
|
| Requires |
Nothing.
|
| Example |
Stellaris
// Enable clock on GPIO_PORTB
GPIO_Clk_Enable(&GPIO_PORTB);
STM32
// Enable clock on GPIOE
GPIO_Clk_Enable(&GPIOE_BASE);
|
| Notes |
Not available for CEC1x02 and MSP432.
|
GPIO_Clk_Disable
| Prototype |
void GPIO_Clk_Disable(unsigned long *port);
|
| Description |
This routine disables clock on the desired port.
|
| Parameters |
port: desired port on which the clock will be disabled.
|
| Returns |
Nothing.
|
| Requires |
Nothing.
|
| Example |
Stellaris
// Enable clock on GPIO_PORTB
GPIO_Clk_Disable(&GPIO_PORTB);
STM32
// Enable clock on GPIOE
GPIO_Clk_Disable(&GPIOE_BASE);
|
| Notes |
Not available for CEC1x02 and MSP432.
|
GPIO_Lock
| Prototype |
void GPIO_Lock(char commit_pins);
|
| Description |
The function locks desired GPIO pins. The pins that can be locked are NMI pin, GPIO_PORTB.7 and JTAG pins, GPIO_PORTC[0..3].
This routine is valid only for Stellaris devices.
|
| Parameters |
commit_pins: pins on which the routine will be applied :
| Value |
Description |
| _GPIO_COMMIT_PIN_B7 |
GPIO_PORTB.7 pin |
| _GPIO_COMMIT_PIN_C0 |
GPIO_PORTC.0 pin |
| _GPIO_COMMIT_PIN_C1 |
GPIO_PORTC.1 pin |
| _GPIO_COMMIT_PIN_C2 |
GPIO_PORTC.2 pin |
| _GPIO_COMMIT_PIN_C3 |
GPIO_PORTC.3 pin |
| _GPIO_COMMIT_PIN_D7 |
GPIO_PORTD.7 pin |
| _GPIO_COMMIT_PIN_F0 |
GPIO_PORTF.0 pin |
|
| Returns |
Nothing.
|
| Requires |
Nothing.
|
| Example |
// Lock JTAG pins by OR-ing the individual bits
GPIO_Lock(_GPIO_COMMIT_PIN_C0 | _GPIO_COMMIT_PIN_C1 | _GPIO_COMMIT_PIN_C2 | _GPIO_COMMIT_PIN_C3);
|
| Notes |
- This routine is valid only for Stellaris devices.
- The predefined General Purpose Input/Output (GPIO) constants used by the library routines are stored in the separate source file.
|
GPIO_Unlock
| Prototype |
void GPIO_Unlock(char commit_pins);
|
| Description |
The function unlocks desired GPIO pins. The pins that can be unlocked are NMI pin, GPIO_PORTB.7 and JTAG pins, GPIO_PORTC[0..3].
This routine is valid only for Stellaris devices.
|
| Parameters |
commit_pins: pins on which the routine will be applied :
| Value |
Description |
| _GPIO_COMMIT_PIN_B7 |
GPIO_PORTB.7 pin |
| _GPIO_COMMIT_PIN_C0 |
GPIO_PORTC.0 pin |
| _GPIO_COMMIT_PIN_C1 |
GPIO_PORTC.1 pin |
| _GPIO_COMMIT_PIN_C2 |
GPIO_PORTC.2 pin |
| _GPIO_COMMIT_PIN_C3 |
GPIO_PORTC.3 pin |
| _GPIO_COMMIT_PIN_D7 |
GPIO_PORTD.7 pin |
| _GPIO_COMMIT_PIN_F0 |
GPIO_PORTF.0 pin |
|
| Returns |
Nothing.
|
| Requires |
Nothing.
|
| Example |
// Unlock JTAG pins by OR-ing the individual bits
GPIO_Unlock(_GPIO_COMMIT_PIN_C0 | _GPIO_COMMIT_PIN_C1 | _GPIO_COMMIT_PIN_C2 | _GPIO_COMMIT_PIN_C3);
|
| Notes |
- This routine is valid only for Stellaris devices.
- The predefined General Purpose Input/Output (GPIO) constants used by the library routines are stored in the separate source file.
|
GPIO_Config
| Prototype |
// for Stellaris MCUs with alternative PORT functions on GPIO pins
char GPIO_Config(unsigned long *port, char pin_mask, char dir, unsigned int config, char pin_code);
// for Stellaris MCUs with dedicated PORT functions
char GPIO_Config(unsigned long *port, char pin_mask, char dir, unsigned int config);
// for MSP432 devices
char GPIO_Config(unsigned int *port, unsigned int pin_mask, char dir, unsigned int config, int pin_code);
// for CEC1x02 and ST MCUs
void GPIO_Config(unsigned long *port, unsigned int pin_mask, unsigned long config);
// for Kinetis
void GPIO_Config(unsigned long *port, unsigned long pin_mask, unsigned long config);
|
| Description |
The function will configure the desired pins according to the parameters used.
|
| Parameters |
port: port we wish to use.
CEC1x02
| Value |
Description |
| _GPIO_PORT_000_007 |
GPIO port consisting of pins 0 - 7. |
| _GPIO_PORT_010_017 |
GPIO port consisting of pins 10 - 17. |
| _GPIO_PORT_020_027 |
GPIO port consisting of pins 20 - 27. |
| _GPIO_PORT_030_037 |
GPIO port consisting of pins 30 - 37. |
| _GPIO_PORT_040_047 |
GPIO port consisting of pins 40 - 47. |
| _GPIO_PORT_050_057 |
GPIO port consisting of pins 50 - 57. |
| _GPIO_PORT_060_067 |
GPIO port consisting of pins 60 - 67. |
| _GPIO_PORT_070_077 |
GPIO port consisting of pins 70 - 77. Valid only for CEC1702 |
| _GPIO_PORT_100_107 |
GPIO port consisting of pins 100 - 107. |
| _GPIO_PORT_110_117 |
GPIO port consisting of pins 110 - 117. |
| _GPIO_PORT_120_127 |
GPIO port consisting of pins 120 - 127. |
| _GPIO_PORT_130_137 |
GPIO port consisting of pins 130 - 137. |
| _GPIO_PORT_140_147 |
GPIO port consisting of pins 140 - 147. |
| _GPIO_PORT_150_157 |
GPIO port consisting of pins 150 - 157. |
| _GPIO_PORT_160_167 |
GPIO port consisting of pins 160 - 167. |
| _GPIO_PORT_170_177 |
GPIO port consisting of pins 170 - 177. Valid only for CEC1702 |
| _GPIO_PORT_200_207 |
GPIO port consisting of pins 200 - 207. |
| _GPIO_PORT_210_217 |
GPIO port consisting of pins 210 - 217. |
| _GPIO_PORT_220_227 |
GPIO port consisting of pins 220 - 227. |
| _GPIO_PORT_230_237 |
GPIO port consisting of pins 230 - 237. |
pin_mask: pins we wish to configure.
Stellaris and MSP432
| Value |
Description |
| _GPIO_PINMASK_0 |
Pin 0 mask. |
| _GPIO_PINMASK_1 |
Pin 1 mask. |
| _GPIO_PINMASK_2 |
Pin 2 mask. |
| _GPIO_PINMASK_3 |
Pin 3 mask. |
| _GPIO_PINMASK_4 |
Pin 4 mask. |
| _GPIO_PINMASK_5 |
Pin 5 mask. |
| _GPIO_PINMASK_6 |
Pin 6 mask. |
| _GPIO_PINMASK_7 |
Pin 7 mask. |
| _GPIO_PINMASK_8 |
Pin 8 mask. MSP432 specific. |
| _GPIO_PINMASK_9 |
Pin 9 mask. MSP432 specific. |
| _GPIO_PINMASK_10 |
Pin 10 mask. MSP432 specific. |
| _GPIO_PINMASK_11 |
Pin 11 mask. MSP432 specific. |
| _GPIO_PINMASK_12 |
Pin 12 mask. MSP432 specific. |
| _GPIO_PINMASK_13 |
Pin 13 mask. MSP432 specific. |
| _GPIO_PINMASK_14 |
Pin 14 mask. MSP432 specific. |
| _GPIO_PINMASK_15 |
Pin 15 mask. MSP432 specific. |
| _GPIO_PINMASK_LOW_PORT |
Low 8 pins masked. MSP432 specific. |
| _GPIO_PINMASK_HI_PORT |
High 8 pins masked. MSP432 specific. |
| _GPIO_PINMASK_ALL |
All pins masked. |
STM32
| Value |
Description |
| _GPIO_PINMASK_0 |
Pin 0 mask. |
| _GPIO_PINMASK_1 |
Pin 1 mask. |
| _GPIO_PINMASK_2 |
Pin 2 mask. |
| _GPIO_PINMASK_3 |
Pin 3 mask. |
| _GPIO_PINMASK_4 |
Pin 4 mask. |
| _GPIO_PINMASK_5 |
Pin 5 mask. |
| _GPIO_PINMASK_6 |
Pin 6 mask. |
| _GPIO_PINMASK_7 |
Pin 7 mask. |
| _GPIO_PINMASK_8 |
Pin 8 mask. |
| _GPIO_PINMASK_9 |
Pin 9 mask. |
| _GPIO_PINMASK_10 |
Pin 10 mask. |
| _GPIO_PINMASK_11 |
Pin 11 mask. |
| _GPIO_PINMASK_12 |
Pin 12 mask. |
| _GPIO_PINMASK_13 |
Pin 13 mask. |
| _GPIO_PINMASK_14 |
Pin 14 mask. |
| _GPIO_PINMASK_15 |
Pin 15 mask. |
| _GPIO_PINMASK_LOW |
Low 8 port pins masked. |
| _GPIO_PINMASK_HIGH |
High 8 port pins masked. |
| _GPIO_PINMASK_ALL |
All pins masked. |
CEC1x02
| Value |
Description |
| _GPIO_PINMASK_0 |
Pin 0 mask. |
| _GPIO_PINMASK_1 |
Pin 1 mask. |
| _GPIO_PINMASK_2 |
Pin 2 mask. |
| _GPIO_PINMASK_3 |
Pin 3 mask. |
| _GPIO_PINMASK_4 |
Pin 4 mask. |
| _GPIO_PINMASK_5 |
Pin 5 mask. |
| _GPIO_PINMASK_6 |
Pin 6 mask. |
| _GPIO_PINMASK_7 |
Pin 7 mask. |
| _GPIO_PINMASK_ALL |
All pins masked. |
Kinetis
| Value |
Description |
| _GPIO_PINMASK_0 |
Pin 0 mask. |
| _GPIO_PINMASK_1 |
Pin 1 mask. |
| _GPIO_PINMASK_2 |
Pin 2 mask. |
| _GPIO_PINMASK_3 |
Pin 3 mask. |
| _GPIO_PINMASK_4 |
Pin 4 mask. |
| _GPIO_PINMASK_5 |
Pin 5 mask. |
| _GPIO_PINMASK_6 |
Pin 6 mask. |
| _GPIO_PINMASK_7 |
Pin 7 mask. |
| _GPIO_PINMASK_8 |
Pin 8 mask. |
| _GPIO_PINMASK_9 |
Pin 9 mask. |
| _GPIO_PINMASK_10 |
Pin 10 mask. |
| _GPIO_PINMASK_11 |
Pin 11 mask. |
| _GPIO_PINMASK_12 |
Pin 12 mask. |
| _GPIO_PINMASK_13 |
Pin 13 mask. |
| _GPIO_PINMASK_14 |
Pin 14 mask. |
| _GPIO_PINMASK_15 |
Pin 15 mask. |
| _GPIO_PINMASK_16 |
Pin 16 mask. |
| _GPIO_PINMASK_17 |
Pin 17 mask. |
| _GPIO_PINMASK_18 |
Pin 18 mask. |
| _GPIO_PINMASK_19 |
Pin 19 mask. |
| _GPIO_PINMASK_20 |
Pin 20 mask. |
| _GPIO_PINMASK_21 |
Pin 21 mask. |
| _GPIO_PINMASK_22 |
Pin 22 mask. |
| _GPIO_PINMASK_23 |
Pin 23 mask. |
| _GPIO_PINMASK_24 |
Pin 24 mask. |
| _GPIO_PINMASK_25 |
Pin 25 mask. |
| _GPIO_PINMASK_26 |
Pin 26 mask. |
| _GPIO_PINMASK_27 |
Pin 27 mask. |
| _GPIO_PINMASK_28 |
Pin 28 mask. |
| _GPIO_PINMASK_29 |
Pin 29 mask. |
| _GPIO_PINMASK_30 |
Pin 30 mask. |
| _GPIO_PINMASK_31 |
Pin 31 mask. |
| _GPIO_PINMASK_LOW |
Low 8 port pins masked. |
| _GPIO_PINMASK_HIGH |
High 8 port pins masked. |
| _GPIO_PINMASK_HIGHER |
Higher 8 port pins masked. |
| _GPIO_PINMASK_HIGHEST |
Highest 8 port pins masked. |
| _GPIO_PINMASK_ALL |
All pins masked. |
dir: direction of the desired pins :
Stellaris and MSP432
| Value |
Description |
| _GPIO_DIR_INPUT |
Set pin as input. |
| _GPIO_DIR_OUTPUT |
Set pin as output. |
| _GPIO_DIR_NO_CHANGE |
No changes to pin direction. |
config: desired function and configuration of the pin :
Stellaris
| Value |
Description |
| _GPIO_CFG_PULL_UP |
Configure pin(s) as pull-up. |
| _GPIO_CFG_PULL_DOWN |
Configure pin(s) as pull-down. |
| _GPIO_CFG_MODE_ALT_FUNCTION |
Pin(s) have alternative, non-GPIO function, such as UART, SPI, I2C... |
| _GPIO_CFG_OPEN_DRAIN |
Configure pin(s) as open-drain. |
| _GPIO_CFG_DRIVE_2mA |
2mA pin output drive strength. |
| _GPIO_CFG_DRIVE_4mA |
4mA pin(s) output drive strength. |
| _GPIO_CFG_DRIVE_8mA |
8mA pin(s) output drive strength. |
| _GPIO_CFG_SLEW_RATE |
Slew rate control. Only available when 8mA drive strength option is used. |
| _GPIO_CFG_DIGITAL_ENABLE |
Configure pin(s) as digital I/O. |
| _GPIO_CFG_ISOLATION_DISABLE |
Configure pin(s) as analog input. |
| _GPIO_CFG_ADC_SRC_TRIGGER |
Configure pin(s) for ADC trigger (available only for Cortex M4 devices). |
| _GPIO_CFG_ADV_SPI |
Configure pin(s) for SPI function. |
| _GPIO_CFG_ADV_I2C |
Configure pin(s) for I2C function. |
| _GPIO_CFG_ADV_UART |
Configure pin(s) for UART function. |
| _GPIO_CFG_ADV_CCP |
Configure pin(s) for CCP function. |
| _GPIO_CFG_ADV_CAN |
Configure pin(s) for CAN function. |
| _GPIO_CFG_ADV_AIN |
Configure pin(s) for analog input. |
MSP432
| Value |
Description |
| _GPIO_CFG_RESISTOR_DISABLE |
Disable pull-up/pull-down. |
| _GPIO_CFG_RESISTOR_ENABLE |
Enable pull-up/pull-down. |
| _GPIO_CFG_DRIVE_REGULAR |
Drive strength regular. |
| _GPIO_CFG_DRIVE_HIGH |
Drive strength high. |
| _GPIO_CFG_INT_LOW2HIGH |
Low to high interrupt edge. |
| _GPIO_CFG_INT_HIGH2LOW |
High to low interrupt edge. |
| _GPIO_CFG_INT_DISABLE |
Interrupt disable. |
| _GPIO_CFG_INT_ENABLE |
Interrupt enable. |
| _GPIO_CFG_ALT_FUNCTION |
Configure pin(s) for alternative function. |
| _GPIO_CFG_SEL_IO |
Configure pin(s) as input/output. |
| _GPIO_CFG_PRIMARY_FUNC |
Configure pin(s) for primary function. |
| _GPIO_CFG_SECONDARY_FUNC |
Configure pin(s) for secondary function. |
| _GPIO_CFG_TERTIARY_FUNC |
Configure pin(s) for tertiary function. |
STM32
Basic
| Value |
Description |
| _GPIO_CFG_PULL_UP |
Configure pin(s) as pull-up. |
| _GPIO_CFG_PULL_DOWN |
Configure pin(s) as pull-down. |
| _GPIO_CFG_PULL_NO |
Configure pin(s) with no pull/down function (floating). |
| _GPIO_CFG_MODE_ALT_FUNCTION |
Pin(s) have alternative, non-GPIO function, such as UART, SPI, I2C... |
| _GPIO_CFG_MODE_ANALOG |
Configure pin(s) for analog. |
| _GPIO_CFG_OTYPE_OD |
Configure pin(s) as open-drain. |
| _GPIO_CFG_OTYPE_PP |
Configure pin(s) as push-pull. |
| _GPIO_CFG_SPEED_400KHZ |
Configure pin(s) for 400 kHz clock. |
| _GPIO_CFG_SPEED_2MHZ |
Configure pin(s) for 2 MHz clock. |
| _GPIO_CFG_SPEED_10MHZ |
Configure pin(s) for 10 MHz clock. |
| _GPIO_CFG_SPEED_25MHZ |
Configure pin(s) for 25 MHz clock. |
| _GPIO_CFG_SPEED_40MHZ |
Configure pin(s) for 40 MHz clock. |
| _GPIO_CFG_SPEED_50MHZ |
Configure pin(s) for 50 MHz clock. |
| _GPIO_CFG_SPEED_100MHZ |
Configure pin(s) for 100 MHz clock. |
| _GPIO_CFG_SPEED_MAX |
Configure pin(s) for maximal clock speed. |
| _GPIO_CFG_DIGITAL_OUTPUT |
Configure pin(s) as digital output. |
| _GPIO_CFG_DIGITAL_INPUT |
Configure pin(s) as digital input. |
| _GPIO_CFG_ANALOG_INPUT |
Configure pin(s) as analog input. |
Timer
Timer 1
| Value |
Description |
| _GPIO_CFG_AF_TIM1 |
Timer 1 Alternate Function mapping |
| _GPIO_CFG_AF2_TIM1 |
Timer 1 Alternate Function 2 mapping |
| _GPIO_CFG_AF6_TIM1 |
Timer 1 Alternate Function 6 mapping |
| _GPIO_CFG_AF11_TIM1 |
Timer 1 Alternate Function 11 mapping |
Timer 2
| Value |
Description |
| _GPIO_CFG_AF_TIM2 |
Timer 2 Alternate Function mapping |
| _GPIO_CFG_AF1_TIM2 |
Timer 2 Alternate Function 1 mapping |
| _GPIO_CFG_AF2_TIM2 |
Timer 2 Alternate Function 2 mapping |
| _GPIO_CFG_AF10_TIM2 |
Timer 2 Alternate Function 10 mapping |
Timer 3
| Value |
Description |
| _GPIO_CFG_AF_TIM3 |
Timer 3 Alternate Function mapping |
| _GPIO_CFG_AF2_TIM3 |
Timer 2 Alternate Function 2 mapping |
| _GPIO_CFG_AF10_TIM3 |
Timer 3 Alternate Function 10 mapping |
Timer 4
| Value |
Description |
| _GPIO_CFG_AF_TIM4 |
Timer 4 Alternate Function mapping |
| _GPIO_CFG_AF2_TIM4 |
Timer 4 Alternate Function 2 mapping |
| _GPIO_CFG_AF10_TIM4 |
Timer 4 Alternate Function 10 mapping |
Timer 5
| Value |
Description |
| _GPIO_CFG_AF_TIM5 |
Timer 5 Alternate Function mapping |
| _GPIO_CFG_AF2_TIM5 |
Timer 5 Alternate Function 2 mapping |
Timer 8
| Value |
Description |
| _GPIO_CFG_AF_TIM8 |
Timer 8 Alternate Function mapping |
| _GPIO_CFG_AF2_TIM8 |
Timer 8 Alternate Function 2 mapping |
| _GPIO_CFG_AF4_TIM8 |
Timer 8 Alternate Function 4 mapping |
| _GPIO_CFG_AF5_TIM8 |
Timer 8 Alternate Function 5 mapping |
| _GPIO_CFG_AF10_TIM8 |
Timer 8 Alternate Function 10 mapping |
Timer 9
| Value |
Description |
| _GPIO_CFG_AF_TIM9 |
Timer 9 Alternate Function mapping |
Timer 10
| Value |
Description |
| _GPIO_CFG_AF_TIM10 |
Timer 10 Alternate Function mapping |
Timer 11
| Value |
Description |
| _GPIO_CFG_AF_TIM11 |
Timer 11 Alternate Function mapping |
Timer 12
| Value |
Description |
| _GPIO_CFG_AF_TIM12 |
Timer 12 Alternate Function mapping |
| _GPIO_CFG_AF9_TIM12 |
Timer 12 Alternate Function 9 mapping |
| _GPIO_CFG_AF10_TIM12 |
Timer 12 Alternate Function 10 mapping |
Timer 13
| Value |
Description |
| _GPIO_CFG_AF_TIM13 |
Timer 13 Alternate Function mapping |
| _GPIO_CFG_AF2_TIM13 |
Timer 13 Alternate Function 2 mapping |
| _GPIO_CFG_AF9_TIM13 |
Timer 13 Alternate Function 9 mapping |
Timer 14
| Value |
Description |
| _GPIO_CFG_AF_TIM14 |
Timer 14 Alternate Function mapping |
| _GPIO_CFG_AF2_TIM14 |
Timer 14 Alternate Function 2 mapping |
| _GPIO_CFG_AF9_TIM14 |
Timer 14 Alternate Function 9 mapping |
Timer 15
| Value |
Description |
| _GPIO_CFG_AF1_TIM15 |
Timer 15 Alternate Function 1 mapping |
| _GPIO_CFG_AF3_TIM15 |
Timer 15 Alternate Function 3 mapping |
| _GPIO_CFG_AF9_TIM15 |
Timer 15 Alternate Function 9 mapping |
Timer 16
| Value |
Description |
| _GPIO_CFG_AF1_TIM16 |
Timer 16 Alternate Function 1 mapping |
| _GPIO_CFG_AF4_TIM16 |
Timer 16 Alternate Function 4 mapping |
Timer 17
| Value |
Description |
| _GPIO_CFG_AF1_TIM17 |
Timer 17 Alternate Function 1 mapping |
| _GPIO_CFG_AF4_TIM17 |
Timer 17 Alternate Function 4 mapping |
| _GPIO_CFG_AF10_TIM17 |
Timer 17 Alternate Function 10 mapping |
Timer 19
| Value |
Description |
| _GPIO_CFG_AF2_TIM19 |
Timer 19 Alternate Function 2 mapping |
I2C
| Value |
Description |
| _GPIO_CFG_AF_I2C1 |
I2C1 Alternate Function mapping |
| _GPIO_CFG_AF4_I2C1 |
I2C1 Alternate Function 4 mapping |
| _GPIO_CFG_AF_I2C2 |
I2C2 Alternate Function mapping |
| _GPIO_CFG_AF4_I2C2 |
I2C2 Alternate Function 4 mapping |
| _GPIO_CFG_AF_I2C3 |
I2C3 Alternate Function mapping |
SPI
| Value |
Description |
| _GPIO_CFG_AF_SPI1 |
SPI1 Alternate Function mapping |
| _GPIO_CFG_AF5_SPI1 |
SPI1 Alternate Function 5 mapping |
| _GPIO_CFG_AF6_SPI1 |
SPI1 Alternate Function 6 mapping |
| _GPIO_CFG_AF_SPI2 |
SPI2/I2S2 Alternate Function mapping |
| _GPIO_CFG_AF5_SPI2 |
SPI2 Alternate Function 5 mapping |
| _GPIO_CFG_AF6_SPI2 |
SPI2 Alternate Function 6 mapping |
| _GPIO_CFG_AF_SPI3 |
SPI3/I2S3 Alternate Function mapping |
| _GPIO_CFG_AF6_SPI3 |
SPI3 Alternate Function 6 mapping |
| _GPIO_CFG_AF_SPI4 |
SPI4 Alternate Function mapping |
| _GPIO_CFG_AF_SPI5 |
SPI5 Alternate Function mapping |
| _GPIO_CFG_AF_SPI6 |
SPI6 Alternate Function mapping |
USART
| Value |
Description |
| _GPIO_CFG_AF_USART1 |
USART1 Alternate Function mapping |
| _GPIO_CFG_AF7_USART1 |
USART1 Alternate Function 7 mapping |
| _GPIO_CFG_AF_USART2 |
USART2 Alternate Function mapping |
| _GPIO_CFG_AF7_USART2 |
USART2 Alternate Function 7 mapping |
| _GPIO_CFG_AF_USART3 |
USART3 Alternate Function mapping |
| _GPIO_CFG_AF7_USART3 |
USART3 Alternate 7 Function mapping |
| _GPIO_CFG_AF_UART4 |
UART4 Alternate Function mapping |
| _GPIO_CFG_AF5_UART4 |
UART4 Alternate Function 4 mapping |
| _GPIO_CFG_AF_UART5 |
UART5 Alternate Function mapping |
| _GPIO_CFG_AF5_UART5 |
UART5 Alternate Function 5 mapping |
| _GPIO_CFG_AF_USART6 |
USART6 Alternate Function mapping |
| _GPIO_CFG_AF_UART7 |
UART7 Alternate Function mapping |
| _GPIO_CFG_AF_UART8 |
UART8 Alternate Function mapping |
CAN
| Value |
Description |
| _GPIO_CFG_AF_CAN1 |
CAN1 Alternate Function mapping |
| _GPIO_CFG_AF_CAN2 |
CAN2 Alternate Function mapping |
| _GPIO_CFG_AF7_CAN |
CAN Alternate Function 7 mapping |
| _GPIO_CFG_AF9_CAN |
CAN Alternate Function 9 mapping |
USB
| Value |
Description |
| _GPIO_CFG_AF_USB |
USB Full speed device Alternate Function mapping |
| _GPIO_CFG_AF14_USB |
USB Full speed device Alternate Function 14 mapping |
| _GPIO_CFG_AF_OTG_FS |
OTG_FS Alternate Function mapping |
| _GPIO_CFG_AF_OTG_HS |
OTG_HS Alternate Function mapping |
| _GPIO_CFG_AF_OTG_HS_FS |
OTG HS configured in FS Alternate Function mapping |
I2S
| Value |
Description |
| _GPIO_CFG_AF5_I2S1 |
I2S1 Alternate Function 5 mapping |
| _GPIO_CFG_AF6_I2S1 |
I2S1 Alternate Function 6 mapping |
| _GPIO_CFG_AF5_I2S2 |
I2S2 Alternate Function 5 mapping |
| _GPIO_CFG_AF6_I2S2 |
I2S2 Alternate Function 6 mapping |
| _GPIO_CFG_AF5_I2S3 |
I2S3 Alternate Function 5 mapping |
| _GPIO_CFG_AF6_I2S3 |
I2S3 Alternate Function 6 mapping |
| _GPIO_CFG_AF_I2S3EXT |
I2S3EXT Alternate Function mapping |
TSC
| Value |
Description |
| _GPIO_CFG_AF3_TSC_G1 |
TSC Group 1 Alternate Function 3 mapping |
| _GPIO_CFG_AF3_TSC_G2 |
TSC Group 2 Alternate Function 3 mapping |
| _GPIO_CFG_AF3_TSC_G3 |
TSC Group 3 Alternate Function 3 mapping |
| _GPIO_CFG_AF3_TSC_G4 |
TSC Group 4 Alternate Function 3 mapping |
| _GPIO_CFG_AF3_TSC_G5 |
TSC Group 5 Alternate Function 3 mapping |
| _GPIO_CFG_AF3_TSC_G6 |
TSC Group 6 Alternate Function 3 mapping |
| _GPIO_CFG_AF3_TSC_G7 |
TSC Group 7 Alternate Function 3 mapping |
| _GPIO_CFG_AF3_TSC_G8 |
TSC Group 8 Alternate Function 3 mapping |
RTC
| Value |
Description |
| _GPIO_CFG_AF_RTC_50Hz |
RTC 50Hz Alternate Function mapping |
| _GPIO_CFG_AF_RTC_AF1 |
RTC AF1 Alternate Function mapping |
| _GPIO_CFG_AF_TAMPER |
TAMPER (TAMPER_1 and TAMPER_2) Alternate Function mapping |
MCO
| Value |
Description |
| _GPIO_CFG_AF_MCO |
MCO (MCO1 and MCO2) Alternate Function mapping |
| _GPIO_CFG_AF0_MCO |
MCO (MCO1 and MCO2) Alternate Function 0 mapping |
| _GPIO_CFG_AF_MCO1 |
MCO1 Alternate Function mapping |
Debug
| Value |
Description |
| _GPIO_CFG_AF_SWJ |
SWJ (SWD and JTAG) Alternate Function mapping |
| _GPIO_CFG_AF_TRACE |
TRACE Alternate Function mapping |
| _GPIO_CFG_AF0_TRACE |
TRACE Alternate Function 0 mapping |
Misc
| Value |
Description |
| _GPIO_CFG_AF_WKUP |
Wakeup (WKUP1, WKUP2 and WKUP3) Alternate Function mapping |
| _GPIO_CFG_AF_LCD |
LCD Alternate Function mapping |
| _GPIO_CFG_AF_ETH |
ETHERNET Alternate Function mapping |
| _GPIO_CFG_AF_FSMC |
FSMC Alternate Function mapping |
| _GPIO_CFG_AF_SDIO |
SDIO Alternate Function mapping |
| _GPIO_CFG_AF_DCMI |
DCMI Alternate Function mapping |
| _GPIO_CFG_AF_RI |
RI Alternate Function mapping |
| _GPIO_CFG_AF_EVENTOUT |
EVENTOUT Alternate Function mapping |
| _GPIO_CFG_AF0_EVENTOUT |
EVENTOUT Alternate Function 0 mapping |
| _GPIO_CFG_AF1_EVENTOUT |
EVENTOUT Alternate Function 1 mapping |
| _GPIO_CFG_AF15_EVENTOUT |
EVENTOUT Alternate Function 15 mapping |
CEC1x02
Basic
| Value |
Description |
| _GPIO_CFG_DIRECTION_INPUT |
Configure pin(s) direction as input. |
| _GPIO_CFG_DIRECTION_OUTPUT |
Configure pin(s) direction as output. |
| _GPIO_CFG_PULL_UP |
Configure pin(s) as pull-up. |
| _GPIO_CFG_PULL_DOWN |
Configure pin(s) as pull-down. |
| _GPIO_CFG_PULL_NO |
Configure pin(s) with no pull/down function (floating). |
| _GPIO_CFG_MODE_ANALOG |
Configure pin(s) for analog. |
| _GPIO_CFG_OUT_BFR_TYPE_OD |
Configure output buffer pin(s) as open-drain. |
| _GPIO_CFG_OUT_BFR_TYPE_PP |
Configure output buffer pin(s) as push-pull. |
| _GPIO_CFG_DIGITAL_OUTPUT |
Configure pin(s) as digital output. |
| _GPIO_CFG_DIGITAL_INPUT |
Configure pin(s) as digital input. |
| _GPIO_CFG_SLEW_RATE_SLOW |
Slow slew rate. |
| _GPIO_CFG_SLEW_RATE_FAST |
Fast slew rate. |
| _GPIO_CFG_WRITE_SEL_ALT |
Alternative GPIO data write is enabled and the Output GPIO is disabled. |
| _GPIO_CFG_WRITE_SEL_OUTPUT |
Alternative GPIO data write is disabled and the Output GPIO is enabled. |
| _GPIO_CFG_POLARITY_INVERTED |
Signal function outputs are inverted and Interrupt Detection sense is inverted. |
| _GPIO_CFG_POLARITY_NON_INVERTED |
Signal function outputs are not inverted and Interrupt Detection sense is not inverted. |
| _GPIO_CFG_MUX_CTRL_GPIO |
GPIO Function Selected. |
| _GPIO_CFG_MUX_CTRL_FUNCT1 |
Signal Function 1 Selected. |
| _GPIO_CFG_MUX_CTRL_FUNCT2 |
Signal Function 2 Selected. |
| _GPIO_CFG_MUX_CTRL_FUNCT3 |
Signal Function 3 Selected. |
| _GPIO_CFG_ALT_GPIO_WRITE_MASK |
Alternative GPIO data. |
| _GPIO_CFG_GPIO_INPUT_PAD_MASK |
GPIO input from pad. |
Power
| Value |
Description |
| _GPIO_CFG_DRIVE_2mA |
2mA pin output drive strength. |
| _GPIO_CFG_DRIVE_4mA |
4mA pin(s) output drive strength. |
| _GPIO_CFG_DRIVE_8mA |
8mA pin(s) output drive strength. |
| _GPIO_CFG_DRIVE_12mA |
12mA pin(s) output drive strength. |
| _GPIO_CFG_PWR_GATE_VCC1 |
VCC1 Power Rail. The output buffer is tristated when VCC1GD = 0. |
| _GPIO_CFG_PWR_GATE_VCC2 |
VCC2 Power Rail. The output buffer is tristated when PWRGD = 0. |
Interrupt
| Value |
Description |
| _GPIO_CFG_INT_DET_EDGE_LO_LVL_SENS |
Interrupt triggered on low level detection. |
| _GPIO_CFG_INT_DET_EDGE_HI_LVL_SENS |
Interrupt triggered on high level detection. |
| _GPIO_CFG_INT_DET_EDGE_RISING |
Interrupt triggered on rising edge detection. |
| _GPIO_CFG_INT_DET_EDGE_FALLING |
Interrupt triggered on falling edge detection. |
| _GPIO_CFG_INT_DET_EDGE_ANY |
Interrupt triggered on any edge detection. |
| _GPIO_CFG_INT_DET_EDGE_DISABLED |
Interrupt events are disabled. |
I2C
| Value |
Description |
| _GPIO_MUX2_I2C0 |
I2C0 function mapping. Valid only for CEC1302. |
| _GPIO_MUX2_I2C1 |
I2C1 function mapping. Valid only for CEC1302. |
| _GPIO_MUX2_I2C2 |
I2C2 function mapping. Valid only for CEC1302. |
| _GPIO_MUX2_I2C3 |
I2C3 function mapping. Valid only for CEC1302. |
| _GPIO_MUX1_I2C |
I2C function mapping. Valid only for CEC1702. |
SPI
| Value |
Description |
| _GPIO_MUX1_SPI0 |
SPI0 function mapping. Valid only for CEC1302. |
| _GPIO_MUX2_SPI0 |
SPI0 function mapping. Valid only for CEC1702. |
UART
| Value |
Description |
| _GPIO_MUX1_UART |
USART function mapping. Valid only for CEC1302. |
| _GPIO_MUX1_UART0 |
USART function mapping. Valid only for CEC1702. |
| _GPIO_MUX1_UART1 |
USART function mapping. Valid only for CEC1702. |
PWM
| Value |
Description |
| _GPIO_MUX1_PWM0 |
PWM0 function mapping. Valid only for CEC1302. |
| _GPIO_MUX1_PWM1 |
PWM1 function mapping. Valid only for CEC1302. |
| _GPIO_MUX1_PWM2 |
PWM2 function mapping. Valid only for CEC1302. |
| _GPIO_MUX1_PWM3 |
PWM3 function mapping. Valid only for CEC1302. |
| _GPIO_MUX1_PWM |
PWM function mapping. Valid only for CEC1702. |
ADC
| Value |
Description |
| _GPIO_MUX1_ADC |
ADC function mapping. |
Kinetis
| Value |
Description |
| _GPIO_CFG_PULL_UP |
Configure pin(s) as pull-up. |
| _GPIO_CFG_PULL_DOWN |
Configure pin(s) as pull-down. |
| _GPIO_CFG_PULL_ENABLE |
Enable pull mode. |
| _GPIO_CFG_PULL_DISABLE |
Disable pull mode. |
| _GPIO_CFG_SLEW_RATE_SLOW |
Enable slow slew rate mode. |
| _GPIO_CFG_SLEW_RATE_FAST |
Enable fast slew rate mode. |
| _GPIO_CFG_PASSIVE_FILT_ENABLE |
Passive filter enable. |
| _GPIO_CFG_PASSIVE_FILT_DISABLE |
Passive filter disable. |
| _GPIO_CFG_TYPE_OD_ENABLED |
Enable open-drain. |
| _GPIO_CFG_TYPE_OD_DISABLED |
Disable open-drain. |
| _GPIO_CFG_DRIVE_STRENGTH_HIGH |
Enable high drive strength. |
| _GPIO_CFG_DRIVE_STRENGTH_LOW |
Enable low drive strength. |
| _GPIO_CFG_MODE_ANALOG |
Configure pin(s) as analog. |
| _GPIO_CFG_MODE_INPUT |
Configure pin(s) as input. |
| _GPIO_CFG_MODE_OUTPUT |
Configure pin(s) as output. |
| _GPIO_CFG_MODE_ALT_FUNCTION |
Configure pin(s) for alternate function. |
| _GPIO_CFG_MUX_ALT0 |
Pin Mux Alternate Function. |
| _GPIO_CFG_MUX_ALT1 |
Pin Mux Alternate Function. |
| _GPIO_CFG_MUX_ALT2 |
Pin Mux Alternate Function. |
| _GPIO_CFG_MUX_ALT3 |
Pin Mux Alternate Function. |
| _GPIO_CFG_MUX_ALT4 |
Pin Mux Alternate Function. |
| _GPIO_CFG_MUX_ALT5 |
Pin Mux Alternate Function. |
| _GPIO_CFG_MUX_ALT6 |
Pin Mux Alternate Function. |
| _GPIO_CFG_MUX_ALT7 |
Pin Mux Alternate Function. |
pin_code: parameter used for selecting the specific peripheral signal for each GPIO pin when using the alternate function mode. |
| Returns |
0 - if there were no errors,1 - if an error occured.
|
| Requires |
Nothing.
|
| Example |
Stellaris
// Configure GPIO_PORTB.0 and GPIO_PORTB.7 pins as digital output, 8mA output drive strength :
GPIO_Config(&GPIO_PORTB, _GPIO_PINMASK_0 | _GPIO_PINMASK_7, _GPIO_DIR_OUTPUT, _GPIO_CFG_DIGITAL_ENABLE | _GPIO_CFG_DRIVE_8mA, _GPIO_PINCODE_NONE);
// Configure ADC on GPIO_PORTE.6 :
GPIO_Config(&GPIO_PORTE, _GPIO_PINMASK_6, _GPIO_DIR_INPUT, _GPIO_CFG_ISOLATION_DISABLE | _GPIO_CFG_MODE_ALT_FUNCTION, _GPIO_PINCODE_NONE);
// Configure SPI on GPIO_PORTA :
GPIO_Config(&GPIO_PORTA,
_GPIO_PINMASK_2 | _GPIO_PINMASK_4 | _GPIO_PINMASK_5,
_GPIO_DIR_NO_CHANGE,
_GPIO_CFG_DIGITAL_ENABLE | _GPIO_CFG_MODE_ALT_FUNCTION | _GPIO_CFG_DRIVE_8mA,
_GPIO_PINCODE_1);
// This is analog to :
GPIO_Config(&GPIO_PORTA,
_GPIO_PINMASK_2 | _GPIO_PINMASK_4 | _GPIO_PINMASK_5,
_GPIO_DIR_NO_CHANGE,
_GPIO_CFG_ADV_SPI,
_GPIO_PINCODE_1);
STM32
// Configure GPIOA_BASE.0 and GPIOA_BASE.7 pins as digital input :
GPIO_Config(&GPIOA_BASE,
_GPIO_PINMASK_0 | _GPIO_PINMASK_7,
_GPIO_CFG_MODE_INPUT | _GPIO_CFG_PULL_NO);
// This is analog to :
GPIO_Config(&GPIOA_BASE,
_GPIO_PINMASK_0 | _GPIO_PINMASK_7,
_GPIO_CFG_DIGITAL_INPUT);
// Configure GPIOA_BASE.0 and GPIOA_BASE.7 pins as digital output :
GPIO_Config(&GPIOA_BASE,
_GPIO_PINMASK_0 | _GPIO_PINMASK_7,
_GPIO_CFG_MODE_OUTPUT | _GPIO_CFG_SPEED_MAX | _GPIO_CFG_OTYPE_PP);
// This is analog to :
GPIO_Config(&GPIOA_BASE,
_GPIO_PINMASK_0 | _GPIO_PINMASK_7,
_GPIO_CFG_DIGITAL_OUTPUT);
// Configure GPIO_PORTA.0 as analog pin :
GPIO_Config(&GPIOA_BASE,
_GPIO_PINMASK_0,
_GPIO_CFG_MODE_ANALOG | _GPIO_CFG_PULL_NO);
// This is analog to :
GPIO_Config(&GPIOA_BASE,
_GPIO_PINMASK_0,
_GPIO_CFG_ANALOG_INPUT);
// Configure SPI on GPIOC :
GPIO_Config(&GPIOC_BASE,
_GPIO_PINMASK_10 | _GPIO_PINMASK_11 | _GPIO_PINMASK_12,
_GPIO_CFG_MODE_ALT_FUNCTION | _GPIO_CFG_OTYPE_PP | _GPIO_CFG_SPEED_50MHZ);
// This is analog to :
GPIO_Config(&GPIOC_BASE,
_GPIO_PINMASK_10 | _GPIO_PINMASK_11 | _GPIO_PINMASK_1,
__SPI_CONFIG);
CEC1x02
// Configure _GPIO_PORT_000_007.0 and _GPIO_PORT_000_007.7 pins as digital input :
GPIO_Config(&_GPIO_PORT_000_007,
_GPIO_PINMASK_0 | _GPIO_PINMASK_7,
_GPIO_CFG_DIRECTION_INPUT | _GPIO_CFG_PULL_NO);
// This is analog to :
GPIO_Config(&_GPIO_PORT_000_007,
_GPIO_PINMASK_0 | _GPIO_PINMASK_7,
_GPIO_CFG_DIGITAL_INPUT);
// Configure _GPIO_PORT_000_007.0 and _GPIO_PORT_000_007.7 pins as digital output :
GPIO_Config(&_GPIO_PORT_000_007,
_GPIO_PINMASK_0 | _GPIO_PINMASK_7,
_GPIO_CFG_DIRECTION_OUTPUT | _GPIO_CFG_OUT_BFR_TYPE_PP);
// This is analog to :
GPIO_Config(&_GPIO_PORT_000_007,
_GPIO_PINMASK_0 | _GPIO_PINMASK_7,
_GPIO_CFG_DIGITAL_OUTPUT);
Kinetis
// Configure PTC_PDOR.0 and _PTC_PDOR.7 pins as digital input :
GPIO_Config(PTC_PDOR, _GPIO_PINMASK_0 | _GPIO_PINMASK_7, _GPIO_CFG_DIGITAL_INPUT);
MSP432
// Configure DIO_PORTA.0 and DIO_PORTA.7 pins as digital input :
GPIO_Config(DIO_PORTA, _GPIO_PINMASK_0 | _GPIO_PINMASK_7, _GPIO_DIR_INPUT, _GPIO_CFG_DRIVE_REGULAR | _GPIO_CFG_INT_DISABLE | _GPIO_CFG_RESISTOR_DISABLE, 0);
|
| Notes |
The predefined General Purpose Input/Output (GPIO) constants used by the library routines are stored in the separate source file.
|
GPIO_Set_Pin_Mode
| Prototype |
void GPIO_Set_Pin_Mode(unsigned long *port, unsigned long pin, unsigned long config);
|
| Description |
The procedure will configure the desired pin according to the parameters used.
This routine is valid for ST and Kinetis devices.
|
| Parameters |
port_base: address of the port we wish to use.pin: pins we wish to configure.
| Value |
Description |
| _GPIO_PIN_0 |
Pin 0. |
| _GPIO_PIN_1 |
Pin 1. |
| _GPIO_PIN_2 |
Pin 2. |
| _GPIO_PIN_3 |
Pin 3. |
| _GPIO_PIN_4 |
Pin 4. |
| _GPIO_PIN_5 |
Pin 5. |
| _GPIO_PIN_6 |
Pin 6. |
| _GPIO_PIN_7 |
Pin 7. |
| _GPIO_PIN_8 |
Pin 8. |
| _GPIO_PIN_9 |
Pin 9. |
| _GPIO_PIN_10 |
Pin 10. |
| _GPIO_PIN_11 |
Pin 11. |
| _GPIO_PIN_12 |
Pin 12. |
| _GPIO_PIN_13 |
Pin 13. |
| _GPIO_PIN_14 |
Pin 14. |
| _GPIO_PIN_15 |
Pin 15. |
| _GPIO_PIN_16 |
Pin 16. |
| _GPIO_PIN_17 |
Pin 17. |
| _GPIO_PIN_18 |
Pin 18. |
| _GPIO_PIN_19 |
Pin 19. |
| _GPIO_PIN_20 |
Pin 20. |
| _GPIO_PIN_21 |
Pin 21. |
| _GPIO_PIN_22 |
Pin 22. |
| _GPIO_PIN_23 |
Pin 23. |
| _GPIO_PIN_24 |
Pin 24. |
| _GPIO_PIN_25 |
Pin 25. |
| _GPIO_PIN_26 |
Pin 26. |
| _GPIO_PIN_27 |
Pin 27. |
| _GPIO_PIN_28 |
Pin 28. |
| _GPIO_PIN_29 |
Pin 29. |
| _GPIO_PIN_30 |
Pin 30. |
| _GPIO_PIN_31 |
Pin 31. |
config: desired function and configuration of the pin. Same as GPIO_Config.
|
| Returns |
Nothing.
|
| Requires |
Nothing.
|
| Example |
GPIO_Set_Pin_Mode(&GPIOE_BASE, _GPIO_PIN_0, _GPIO_CFG_MODE_OUTPUT | _GPIO_CFG_PULL_UP);
|
| Notes |
The predefined General Purpose Input/Output (GPIO) constants used by the library routines are stored in the separate source file..
|
| Prototype |
// for Stellaris MCUs :
char GPIO_Digital_Input(unsigned long *port, char pin_mask);
// for CEC1x02, ST, Kinetis and MSP432 MCUs :
void GPIO_Digital_Input(unsigned long *port, unsigned long pin_mask);
|
| Description |
The function configures desired pins as digital input.
|
| Parameters |
port: desired port on which the function will be applied.
CEC1x02
| Value |
Description |
| _GPIO_PORT_000_007 |
GPIO port consisting of pins 0 - 7. |
| _GPIO_PORT_010_017 |
GPIO port consisting of pins 10 - 17. |
| _GPIO_PORT_020_027 |
GPIO port consisting of pins 20 - 27. |
| _GPIO_PORT_030_037 |
GPIO port consisting of pins 30 - 37. |
| _GPIO_PORT_040_047 |
GPIO port consisting of pins 40 - 47. |
| _GPIO_PORT_050_057 |
GPIO port consisting of pins 50 - 57. |
| _GPIO_PORT_060_067 |
GPIO port consisting of pins 60 - 67. |
| _GPIO_PORT_070_077 |
GPIO port consisting of pins 70 - 77. Valid only for CEC1702 |
| _GPIO_PORT_100_107 |
GPIO port consisting of pins 100 - 107. |
| _GPIO_PORT_110_117 |
GPIO port consisting of pins 110 - 117. |
| _GPIO_PORT_120_127 |
GPIO port consisting of pins 120 - 127. |
| _GPIO_PORT_130_137 |
GPIO port consisting of pins 130 - 137. |
| _GPIO_PORT_140_147 |
GPIO port consisting of pins 140 - 147. |
| _GPIO_PORT_150_157 |
GPIO port consisting of pins 150 - 157. |
| _GPIO_PORT_160_167 |
GPIO port consisting of pins 160 - 167. |
| _GPIO_PORT_170_177 |
GPIO port consisting of pins 170 - 177. Valid only for CEC1702 |
| _GPIO_PORT_200_207 |
GPIO port consisting of pins 200 - 207. |
| _GPIO_PORT_210_217 |
GPIO port consisting of pins 210 - 217. |
| _GPIO_PORT_220_227 |
GPIO port consisting of pins 220 - 227. |
| _GPIO_PORT_230_237 |
GPIO port consisting of pins 230 - 237. |
pin_mask: desired pin(s) on which the function will be applied :
Stellaris and MSP432
| Value |
Description |
| _GPIO_PINMASK_0 |
Pin 0 mask. |
| _GPIO_PINMASK_1 |
Pin 1 mask. |
| _GPIO_PINMASK_2 |
Pin 2 mask. |
| _GPIO_PINMASK_3 |
Pin 3 mask. |
| _GPIO_PINMASK_4 |
Pin 4 mask. |
| _GPIO_PINMASK_5 |
Pin 5 mask. |
| _GPIO_PINMASK_6 |
Pin 6 mask. |
| _GPIO_PINMASK_7 |
Pin 7 mask. |
| _GPIO_PINMASK_8 |
Pin 8 mask. MSP432 specific. |
| _GPIO_PINMASK_9 |
Pin 9 mask. MSP432 specific. |
| _GPIO_PINMASK_10 |
Pin 10 mask. MSP432 specific. |
| _GPIO_PINMASK_11 |
Pin 11 mask. MSP432 specific. |
| _GPIO_PINMASK_12 |
Pin 12 mask. MSP432 specific. |
| _GPIO_PINMASK_13 |
Pin 13 mask. MSP432 specific. |
| _GPIO_PINMASK_14 |
Pin 14 mask. MSP432 specific. |
| _GPIO_PINMASK_15 |
Pin 15 mask. MSP432 specific. |
| _GPIO_PINMASK_LOW_PORT |
Low 8 pins masked. MSP432 specific. |
| _GPIO_PINMASK_HI_PORT |
High 8 pins masked. MSP432 specific. |
| _GPIO_PINMASK_ALL |
All pins masked. |
STM32
| Value |
Description |
| _GPIO_PINMASK_0 |
Pin 0 mask. |
| _GPIO_PINMASK_1 |
Pin 1 mask. |
| _GPIO_PINMASK_2 |
Pin 2 mask. |
| _GPIO_PINMASK_3 |
Pin 3 mask. |
| _GPIO_PINMASK_4 |
Pin 4 mask. |
| _GPIO_PINMASK_5 |
Pin 5 mask. |
| _GPIO_PINMASK_6 |
Pin 6 mask. |
| _GPIO_PINMASK_7 |
Pin 7 mask. |
| _GPIO_PINMASK_8 |
Pin 8 mask. |
| _GPIO_PINMASK_9 |
Pin 9 mask. |
| _GPIO_PINMASK_10 |
Pin 10 mask. |
| _GPIO_PINMASK_11 |
Pin 11 mask. |
| _GPIO_PINMASK_12 |
Pin 12 mask. |
| _GPIO_PINMASK_13 |
Pin 13 mask. |
| _GPIO_PINMASK_14 |
Pin 14 mask. |
| _GPIO_PINMASK_15 |
Pin 15 mask. |
| _GPIO_PINMASK_LOW |
Low 8 port pins masked. |
| _GPIO_PINMASK_HIGH |
High 8 port pins masked. |
| _GPIO_PINMASK_ALL |
All pins masked. |
CEC1x02
| Value |
Description |
| _GPIO_PINMASK_0 |
Pin 0 mask. |
| _GPIO_PINMASK_1 |
Pin 1 mask. |
| _GPIO_PINMASK_2 |
Pin 2 mask. |
| _GPIO_PINMASK_3 |
Pin 3 mask. |
| _GPIO_PINMASK_4 |
Pin 4 mask. |
| _GPIO_PINMASK_5 |
Pin 5 mask. |
| _GPIO_PINMASK_6 |
Pin 6 mask. |
| _GPIO_PINMASK_7 |
Pin 7 mask. |
| _GPIO_PINMASK_ALL |
All pins masked. |
Kinetis
| Value |
Description |
| _GPIO_PINMASK_0 |
Pin 0 mask. |
| _GPIO_PINMASK_1 |
Pin 1 mask. |
| _GPIO_PINMASK_2 |
Pin 2 mask. |
| _GPIO_PINMASK_3 |
Pin 3 mask. |
| _GPIO_PINMASK_4 |
Pin 4 mask. |
| _GPIO_PINMASK_5 |
Pin 5 mask. |
| _GPIO_PINMASK_6 |
Pin 6 mask. |
| _GPIO_PINMASK_7 |
Pin 7 mask. |
| _GPIO_PINMASK_8 |
Pin 8 mask. |
| _GPIO_PINMASK_9 |
Pin 9 mask. |
| _GPIO_PINMASK_10 |
Pin 10 mask. |
| _GPIO_PINMASK_11 |
Pin 11 mask. |
| _GPIO_PINMASK_12 |
Pin 12 mask. |
| _GPIO_PINMASK_13 |
Pin 13 mask. |
| _GPIO_PINMASK_14 |
Pin 14 mask. |
| _GPIO_PINMASK_15 |
Pin 15 mask. |
| _GPIO_PINMASK_16 |
Pin 16 mask. |
| _GPIO_PINMASK_17 |
Pin 17 mask. |
| _GPIO_PINMASK_18 |
Pin 18 mask. |
| _GPIO_PINMASK_19 |
Pin 19 mask. |
| _GPIO_PINMASK_20 |
Pin 20 mask. |
| _GPIO_PINMASK_21 |
Pin 21 mask. |
| _GPIO_PINMASK_22 |
Pin 22 mask. |
| _GPIO_PINMASK_23 |
Pin 23 mask. |
| _GPIO_PINMASK_24 |
Pin 24 mask. |
| _GPIO_PINMASK_25 |
Pin 25 mask. |
| _GPIO_PINMASK_26 |
Pin 26 mask. |
| _GPIO_PINMASK_27 |
Pin 27 mask. |
| _GPIO_PINMASK_28 |
Pin 28 mask. |
| _GPIO_PINMASK_29 |
Pin 29 mask. |
| _GPIO_PINMASK_30 |
Pin 30 mask. |
| _GPIO_PINMASK_31 |
Pin 31 mask. |
| _GPIO_PINMASK_LOW |
Low 8 port pins masked. |
| _GPIO_PINMASK_HIGH |
High 8 port pins masked. |
| _GPIO_PINMASK_HIGHER |
Higher 8 port pins masked. |
| _GPIO_PINMASK_HIGHEST |
Highest 8 port pins masked. |
| _GPIO_PINMASK_ALL |
All pins masked. |
|
| Returns |
0 - if there were no errors,1 - if an error occured.
|
| Requires |
Nothing.
|
| Example |
Stellaris
// Set GPIO_PORTE poins 0 and 1 as digital input
GPIO_Digital_Input(&GPIO_PORTE, _GPIO_PINMASK_0 | _GPIO_PINMASK_1);
// This is analog to :
GPIO_Config(&GPIO_PORTE,
_GPIO_PINMASK_0 | _GPIO_PINMASK_1,
_GPIO_DIR_INPUT,
_GPIO_CFG_DIGITAL_ENABLE,
_GPIO_PINCODE_NONE);
STM32
// Set GPIOC pins 0 and 1 as digital input
GPIO_Digital_Input(&GPIOC_BASE, _GPIO_PINMASK_0 | _GPIO_PINMASK_1);
// This is analog to :
GPIO_Config(&GPIOC_BASE,
_GPIO_PINMASK_0 | _GPIO_PINMASK_1,
_GPIO_CFG_MODE_INPUT | _GPIO_CFG_PULL_NO);
CEC1x02
// Set GPIO_PORT_000_007 pins 0 and 1 as digital input
GPIO_Digital_Input(&GPIO_PORT_000_007, _GPIO_PINMASK_0 | _GPIO_PINMASK_1);
// This is analog to :
GPIO_Config(&GPIO_PORT_000_007,
_GPIO_PINMASK_0 | _GPIO_PINMASK_1,
_GPIO_CFG_DIGITAL_INPUT);
Kinetis
// Set PTC_PDOR pins 0 and 1 as digital input
GPIO_Digital_Input(&PTC_PDOR, _GPIO_PINMASK_0 | _GPIO_PINMASK_1);
MSP432
// Set DIO_PORTA pins 0 and 1 as digital input
GPIO_Digital_Input(&DIO_PORTA, _GPIO_PINMASK_0 | _GPIO_PINMASK_1);
|
| Notes |
The predefined General Purpose Input/Output (GPIO) constants used by the library routines are stored in the separate source file..
|
GPIO_Digital_Output
| Prototype |
// for Stellaris MCUs :
char GPIO_Digital_Output(unsigned long *port, char pin_mask);
// for CEC1x02, ST, Kinetis and MSP432 MCUs :
void GPIO_Digital_Output(unsigned long *port, unsigned long pin_mask);
|
| Description |
The function configures desired pin(s) as digital output.
|
| Parameters |
port: desired port on which the function will be applied.
CEC1x02
| Value |
Description |
| _GPIO_PORT_000_007 |
GPIO port consisting of pins 0 - 7. |
| _GPIO_PORT_010_017 |
GPIO port consisting of pins 10 - 17. |
| _GPIO_PORT_020_027 |
GPIO port consisting of pins 20 - 27. |
| _GPIO_PORT_030_037 |
GPIO port consisting of pins 30 - 37. |
| _GPIO_PORT_040_047 |
GPIO port consisting of pins 40 - 47. |
| _GPIO_PORT_050_057 |
GPIO port consisting of pins 50 - 57. |
| _GPIO_PORT_060_067 |
GPIO port consisting of pins 60 - 67. |
| _GPIO_PORT_070_077 |
GPIO port consisting of pins 70 - 77. Valid only for CEC1702 |
| _GPIO_PORT_100_107 |
GPIO port consisting of pins 100 - 107. |
| _GPIO_PORT_110_117 |
GPIO port consisting of pins 110 - 117. |
| _GPIO_PORT_120_127 |
GPIO port consisting of pins 120 - 127. |
| _GPIO_PORT_130_137 |
GPIO port consisting of pins 130 - 137. |
| _GPIO_PORT_140_147 |
GPIO port consisting of pins 140 - 147. |
| _GPIO_PORT_150_157 |
GPIO port consisting of pins 150 - 157. |
| _GPIO_PORT_160_167 |
GPIO port consisting of pins 160 - 167. |
| _GPIO_PORT_170_177 |
GPIO port consisting of pins 170 - 177. Valid only for CEC1702 |
| _GPIO_PORT_200_207 |
GPIO port consisting of pins 200 - 207. |
| _GPIO_PORT_210_217 |
GPIO port consisting of pins 210 - 217. |
| _GPIO_PORT_220_227 |
GPIO port consisting of pins 220 - 227. |
| _GPIO_PORT_230_237 |
GPIO port consisting of pins 230 - 237. |
pin_mask: desired pin(s) on which the function will be applied :
Stellaris and MSP432
| Value |
Description |
| _GPIO_PINMASK_0 |
Pin 0 mask. |
| _GPIO_PINMASK_1 |
Pin 1 mask. |
| _GPIO_PINMASK_2 |
Pin 2 mask. |
| _GPIO_PINMASK_3 |
Pin 3 mask. |
| _GPIO_PINMASK_4 |
Pin 4 mask. |
| _GPIO_PINMASK_5 |
Pin 5 mask. |
| _GPIO_PINMASK_6 |
Pin 6 mask. |
| _GPIO_PINMASK_7 |
Pin 7 mask. |
| _GPIO_PINMASK_8 |
Pin 8 mask. MSP432 specific. |
| _GPIO_PINMASK_9 |
Pin 9 mask. MSP432 specific. |
| _GPIO_PINMASK_10 |
Pin 10 mask. MSP432 specific. |
| _GPIO_PINMASK_11 |
Pin 11 mask. MSP432 specific. |
| _GPIO_PINMASK_12 |
Pin 12 mask. MSP432 specific. |
| _GPIO_PINMASK_13 |
Pin 13 mask. MSP432 specific. |
| _GPIO_PINMASK_14 |
Pin 14 mask. MSP432 specific. |
| _GPIO_PINMASK_15 |
Pin 15 mask. MSP432 specific. |
| _GPIO_PINMASK_LOW_PORT |
Low 8 pins masked. MSP432 specific. |
| _GPIO_PINMASK_HI_PORT |
High 8 pins masked. MSP432 specific. |
| _GPIO_PINMASK_ALL |
All pins masked. |
STM32
| Value |
Description |
| _GPIO_PINMASK_0 |
Pin 0 mask. |
| _GPIO_PINMASK_1 |
Pin 1 mask. |
| _GPIO_PINMASK_2 |
Pin 2 mask. |
| _GPIO_PINMASK_3 |
Pin 3 mask. |
| _GPIO_PINMASK_4 |
Pin 4 mask. |
| _GPIO_PINMASK_5 |
Pin 5 mask. |
| _GPIO_PINMASK_6 |
Pin 6 mask. |
| _GPIO_PINMASK_7 |
Pin 7 mask. |
| _GPIO_PINMASK_8 |
Pin 8 mask. |
| _GPIO_PINMASK_9 |
Pin 9 mask. |
| _GPIO_PINMASK_10 |
Pin 10 mask. |
| _GPIO_PINMASK_11 |
Pin 11 mask. |
| _GPIO_PINMASK_12 |
Pin 12 mask. |
| _GPIO_PINMASK_13 |
Pin 13 mask. |
| _GPIO_PINMASK_14 |
Pin 14 mask. |
| _GPIO_PINMASK_15 |
Pin 15 mask. |
| _GPIO_PINMASK_LOW |
Low 8 port pins masked. |
| _GPIO_PINMASK_HIGH |
High 8 port pins masked. |
| _GPIO_PINMASK_ALL |
All pins masked. |
CEC1x02
| Value |
Description |
| _GPIO_PINMASK_0 |
Pin 0 mask. |
| _GPIO_PINMASK_1 |
Pin 1 mask. |
| _GPIO_PINMASK_2 |
Pin 2 mask. |
| _GPIO_PINMASK_3 |
Pin 3 mask. |
| _GPIO_PINMASK_4 |
Pin 4 mask. |
| _GPIO_PINMASK_5 |
Pin 5 mask. |
| _GPIO_PINMASK_6 |
Pin 6 mask. |
| _GPIO_PINMASK_7 |
Pin 7 mask. |
| _GPIO_PINMASK_ALL |
All pins masked. |
Kinetis
| Value |
Description |
| _GPIO_PINMASK_0 |
Pin 0 mask. |
| _GPIO_PINMASK_1 |
Pin 1 mask. |
| _GPIO_PINMASK_2 |
Pin 2 mask. |
| _GPIO_PINMASK_3 |
Pin 3 mask. |
| _GPIO_PINMASK_4 |
Pin 4 mask. |
| _GPIO_PINMASK_5 |
Pin 5 mask. |
| _GPIO_PINMASK_6 |
Pin 6 mask. |
| _GPIO_PINMASK_7 |
Pin 7 mask. |
| _GPIO_PINMASK_8 |
Pin 8 mask. |
| _GPIO_PINMASK_9 |
Pin 9 mask. |
| _GPIO_PINMASK_10 |
Pin 10 mask. |
| _GPIO_PINMASK_11 |
Pin 11 mask. |
| _GPIO_PINMASK_12 |
Pin 12 mask. |
| _GPIO_PINMASK_13 |
Pin 13 mask. |
| _GPIO_PINMASK_14 |
Pin 14 mask. |
| _GPIO_PINMASK_15 |
Pin 15 mask. |
| _GPIO_PINMASK_16 |
Pin 16 mask. |
| _GPIO_PINMASK_17 |
Pin 17 mask. |
| _GPIO_PINMASK_18 |
Pin 18 mask. |
| _GPIO_PINMASK_19 |
Pin 19 mask. |
| _GPIO_PINMASK_20 |
Pin 20 mask. |
| _GPIO_PINMASK_21 |
Pin 21 mask. |
| _GPIO_PINMASK_22 |
Pin 22 mask. |
| _GPIO_PINMASK_23 |
Pin 23 mask. |
| _GPIO_PINMASK_24 |
Pin 24 mask. |
| _GPIO_PINMASK_25 |
Pin 25 mask. |
| _GPIO_PINMASK_26 |
Pin 26 mask. |
| _GPIO_PINMASK_27 |
Pin 27 mask. |
| _GPIO_PINMASK_28 |
Pin 28 mask. |
| _GPIO_PINMASK_29 |
Pin 29 mask. |
| _GPIO_PINMASK_30 |
Pin 30 mask. |
| _GPIO_PINMASK_31 |
Pin 31 mask. |
| _GPIO_PINMASK_LOW |
Low 8 port pins masked. |
| _GPIO_PINMASK_HIGH |
High 8 port pins masked. |
| _GPIO_PINMASK_HIGHER |
Higher 8 port pins masked. |
| _GPIO_PINMASK_HIGHEST |
Highest 8 port pins masked. |
| _GPIO_PINMASK_ALL |
All pins masked. |
|
| Returns |
0 - if there were no errors,1 - if an error occured.
|
| Requires |
Nothing.
|
| Example |
Stellaris
// Set GPIO_PORTD pin 1 as digital output
GPIO_Digital_Output(&GPIO_PORTD, _GPIO_PINMASK_1);
// This is analog to :
GPIO_Config(&GPIO_PORTD,
_GPIO_PINMASK_1,
_GPIO_DIR_OUTPUT,
_GPIO_CFG_DIGITAL_ENABLE | _GPIO_CFG_DRIVE_8mA,
_GPIO_PINCODE_NONE);
STM32
// Set GPIOC pins 0 and 1 as digital output
GPIO_Digital_Output(&GPIOC_BASE, _GPIO_PINMASK_0 | _GPIO_PINMASK_1);
// This is analog to :
GPIO_Config(&GPIOC_BASE,
_GPIO_PINMASK_0 | _GPIO_PINMASK_1,
_GPIO_CFG_MODE_OUTPUT | _GPIO_CFG_SPEED_MAX | _GPIO_CFG_OTYPE_PP);
CEC1x02
// Set GPIO_PORT_000_007 pins 0 and 1 as digital output
GPIO_Digital_Output(&GPIO_PORT_000_007, _GPIO_PINMASK_0 | _GPIO_PINMASK_1);
// This is analog to :
GPIO_Config(&GPIO_PORT_000_007,
_GPIO_PINMASK_0 | _GPIO_PINMASK_1,
_GPIO_CFG_DIGITAL_OUTPUT);
Kinetis
// Set PTC_PDOR pins 0 and 1 as digital output
GPIO_Digital_Output(&PTC_PDOR, _GPIO_PINMASK_0 | _GPIO_PINMASK_1);
MSP432
// Set DIO_PORTA pins 0 and 1 as digital output
GPIO_Digital_Output(&DIO_PORTA, _GPIO_PINMASK_0 | _GPIO_PINMASK_1);
|
| Notes |
The predefined General Purpose Input/Output (GPIO) constants used by the library routines are stored in the separate source file..
|
| Prototype |
// for Stellaris MCUs :
char GPIO_Analog_Input(unsigned long *port, char pin_mask);
// for CEC1x02, ST, Kinetis and MSP432 MCUs :
void GPIO_Analog_Input(unsigned long *port, unsigned long pin_mask);
|
| Description |
The function configures desired pin(s) as analog input.
|
| Parameters |
port: desired port on which the function will be applied.
CEC1x02
| Value |
Description |
| _GPIO_PORT_000_007 |
GPIO port consisting of pins 0 - 7. |
| _GPIO_PORT_010_017 |
GPIO port consisting of pins 10 - 17. |
| _GPIO_PORT_020_027 |
GPIO port consisting of pins 20 - 27. |
| _GPIO_PORT_030_037 |
GPIO port consisting of pins 30 - 37. |
| _GPIO_PORT_040_047 |
GPIO port consisting of pins 40 - 47. |
| _GPIO_PORT_050_057 |
GPIO port consisting of pins 50 - 57. |
| _GPIO_PORT_060_067 |
GPIO port consisting of pins 60 - 67. |
| _GPIO_PORT_070_077 |
GPIO port consisting of pins 70 - 77. Valid only for CEC1702 |
| _GPIO_PORT_100_107 |
GPIO port consisting of pins 100 - 107. |
| _GPIO_PORT_110_117 |
GPIO port consisting of pins 110 - 117. |
| _GPIO_PORT_120_127 |
GPIO port consisting of pins 120 - 127. |
| _GPIO_PORT_130_137 |
GPIO port consisting of pins 130 - 137. |
| _GPIO_PORT_140_147 |
GPIO port consisting of pins 140 - 147. |
| _GPIO_PORT_150_157 |
GPIO port consisting of pins 150 - 157. |
| _GPIO_PORT_160_167 |
GPIO port consisting of pins 160 - 167. |
| _GPIO_PORT_170_177 |
GPIO port consisting of pins 170 - 177. Valid only for CEC1702 |
| _GPIO_PORT_200_207 |
GPIO port consisting of pins 200 - 207. |
| _GPIO_PORT_210_217 |
GPIO port consisting of pins 210 - 217. |
| _GPIO_PORT_220_227 |
GPIO port consisting of pins 220 - 227. |
| _GPIO_PORT_230_237 |
GPIO port consisting of pins 230 - 237. |
pin_mask: desired pin(s) on which the function will be applied :
Stellaris and MSP432
| Value |
Description |
| _GPIO_PINMASK_0 |
Pin 0 mask. |
| _GPIO_PINMASK_1 |
Pin 1 mask. |
| _GPIO_PINMASK_2 |
Pin 2 mask. |
| _GPIO_PINMASK_3 |
Pin 3 mask. |
| _GPIO_PINMASK_4 |
Pin 4 mask. |
| _GPIO_PINMASK_5 |
Pin 5 mask. |
| _GPIO_PINMASK_6 |
Pin 6 mask. |
| _GPIO_PINMASK_7 |
Pin 7 mask. |
| _GPIO_PINMASK_8 |
Pin 8 mask. MSP432 specific. |
| _GPIO_PINMASK_9 |
Pin 9 mask. MSP432 specific. |
| _GPIO_PINMASK_10 |
Pin 10 mask. MSP432 specific. |
| _GPIO_PINMASK_11 |
Pin 11 mask. MSP432 specific. |
| _GPIO_PINMASK_12 |
Pin 12 mask. MSP432 specific. |
| _GPIO_PINMASK_13 |
Pin 13 mask. MSP432 specific. |
| _GPIO_PINMASK_14 |
Pin 14 mask. MSP432 specific. |
| _GPIO_PINMASK_15 |
Pin 15 mask. MSP432 specific. |
| _GPIO_PINMASK_LOW_PORT |
Low 8 pins masked. MSP432 specific. |
| _GPIO_PINMASK_HI_PORT |
High 8 pins masked. MSP432 specific. |
| _GPIO_PINMASK_ALL |
All pins masked. |
STM32
| Value |
Description |
| _GPIO_PINMASK_0 |
Pin 0 mask. |
| _GPIO_PINMASK_1 |
Pin 1 mask. |
| _GPIO_PINMASK_2 |
Pin 2 mask. |
| _GPIO_PINMASK_3 |
Pin 3 mask. |
| _GPIO_PINMASK_4 |
Pin 4 mask. |
| _GPIO_PINMASK_5 |
Pin 5 mask. |
| _GPIO_PINMASK_6 |
Pin 6 mask. |
| _GPIO_PINMASK_7 |
Pin 7 mask. |
| _GPIO_PINMASK_8 |
Pin 8 mask. |
| _GPIO_PINMASK_9 |
Pin 9 mask. |
| _GPIO_PINMASK_10 |
Pin 10 mask. |
| _GPIO_PINMASK_11 |
Pin 11 mask. |
| _GPIO_PINMASK_12 |
Pin 12 mask. |
| _GPIO_PINMASK_13 |
Pin 13 mask. |
| _GPIO_PINMASK_14 |
Pin 14 mask. |
| _GPIO_PINMASK_15 |
Pin 15 mask. |
| _GPIO_PINMASK_LOW |
Low 8 port pins masked. |
| _GPIO_PINMASK_HIGH |
High 8 port pins masked. |
| _GPIO_PINMASK_ALL |
All pins masked. |
CEC1x02
| Value |
Description |
| _GPIO_PINMASK_0 |
Pin 0 mask. |
| _GPIO_PINMASK_1 |
Pin 1 mask. |
| _GPIO_PINMASK_2 |
Pin 2 mask. |
| _GPIO_PINMASK_3 |
Pin 3 mask. |
| _GPIO_PINMASK_4 |
Pin 4 mask. |
| _GPIO_PINMASK_5 |
Pin 5 mask. |
| _GPIO_PINMASK_6 |
Pin 6 mask. |
| _GPIO_PINMASK_7 |
Pin 7 mask. |
| _GPIO_PINMASK_ALL |
All pins masked. |
Kinetis
| Value |
Description |
| _GPIO_PINMASK_0 |
Pin 0 mask. |
| _GPIO_PINMASK_1 |
Pin 1 mask. |
| _GPIO_PINMASK_2 |
Pin 2 mask. |
| _GPIO_PINMASK_3 |
Pin 3 mask. |
| _GPIO_PINMASK_4 |
Pin 4 mask. |
| _GPIO_PINMASK_5 |
Pin 5 mask. |
| _GPIO_PINMASK_6 |
Pin 6 mask. |
| _GPIO_PINMASK_7 |
Pin 7 mask. |
| _GPIO_PINMASK_8 |
Pin 8 mask. |
| _GPIO_PINMASK_9 |
Pin 9 mask. |
| _GPIO_PINMASK_10 |
Pin 10 mask. |
| _GPIO_PINMASK_11 |
Pin 11 mask. |
| _GPIO_PINMASK_12 |
Pin 12 mask. |
| _GPIO_PINMASK_13 |
Pin 13 mask. |
| _GPIO_PINMASK_14 |
Pin 14 mask. |
| _GPIO_PINMASK_15 |
Pin 15 mask. |
| _GPIO_PINMASK_16 |
Pin 16 mask. |
| _GPIO_PINMASK_17 |
Pin 17 mask. |
| _GPIO_PINMASK_18 |
Pin 18 mask. |
| _GPIO_PINMASK_19 |
Pin 19 mask. |
| _GPIO_PINMASK_20 |
Pin 20 mask. |
| _GPIO_PINMASK_21 |
Pin 21 mask. |
| _GPIO_PINMASK_22 |
Pin 22 mask. |
| _GPIO_PINMASK_23 |
Pin 23 mask. |
| _GPIO_PINMASK_24 |
Pin 24 mask. |
| _GPIO_PINMASK_25 |
Pin 25 mask. |
| _GPIO_PINMASK_26 |
Pin 26 mask. |
| _GPIO_PINMASK_27 |
Pin 27 mask. |
| _GPIO_PINMASK_28 |
Pin 28 mask. |
| _GPIO_PINMASK_29 |
Pin 29 mask. |
| _GPIO_PINMASK_30 |
Pin 30 mask. |
| _GPIO_PINMASK_31 |
Pin 31 mask. |
| _GPIO_PINMASK_LOW |
Low 8 port pins masked. |
| _GPIO_PINMASK_HIGH |
High 8 port pins masked. |
| _GPIO_PINMASK_HIGHER |
Higher 8 port pins masked. |
| _GPIO_PINMASK_HIGHEST |
Highest 8 port pins masked. |
| _GPIO_PINMASK_ALL |
All pins masked. |
|
| Returns |
0 - if there were no errors,1 - if an error occured.
|
| Requires |
Nothing.
|
| Example |
Stellaris
// Set GPIO_PORTE pins 0 and 1 as analog input
GPIO_Analog_Input(&GPIO_PORTE, _GPIO_PINMASK_0 | _GPIO_PINMASK_1);
// This is analog to :
GPIO_Config(&GPIO_PORTE,
_GPIO_PINMASK_0 | _GPIO_PINMASK_1,
_GPIO_DIR_INPUT,
_GPIO_CFG_ISOLATION_DISABLE | _GPIO_CFG_MODE_ALT_FUNCTION,
_GPIO_PINCODE_NONE);
STM32
// Set GPIOA_BASE pin 0 as analog input
GPIO_Analog_Input(&GPIOA_BASE, _GPIO_PINMASK_0);
// This is analog to :
GPIO_Config(&GPIOA_BASE,
_GPIO_PINMASK_0,
_GPIO_CFG_MODE_ANALOG | _GPIO_CFG_PULL_NO);
CEC1x02
// Set GPIOA_BASE pin 0 as analog input
GPIO_Analog_Input(&GPIOA_BASE, _GPIO_PINMASK_0);
// This is analog to :
GPIO_Config(&GPIOA_BASE,
_GPIO_PINMASK_0,
_GPIO_CFG_MODE_ANALOG | _GPIO_CFG_PULL_NO);
Kinetis
// Set PTC_PDOR pins 0 and 1 as analog input
GPIO_Analog_Input(&PTC_PDOR, _GPIO_PINMASK_0 | _GPIO_PINMASK_1);
MSP432
// Set DIO_PORTA pins 0 and 1 as analog input
GPIO_Analog_Input(&DIO_PORTA, _GPIO_PINMASK_0 | _GPIO_PINMASK_1);
|
| Notes |
The predefined General Purpose Input/Output (GPIO) constants used by the library routines are stored in the separate source file..
|
GPIO_Alternate_Function_Enable
| Prototype |
void GPIO_Alternate_Function_Enable(const Module_Struct *module);
|
| Description |
This routine enables desired alternative function on GPIO pins using a predefined internal module pinout as a parameter.
|
| Parameters |
Module_Struct: desired module pinout.
|
| Returns |
Nothing.
|
| Requires |
This routine is available only for MCUs with alternative PORT functions on GPIO pins.
|
| Example |
Stellaris
// Enable SPI0 on GPIO_PORTA
GPIO_Alternate_Function_Enable(&_GPIO_MODULE_SPI0_A245);
STM32
// Enable SPI3 on PORTB
GPIO_Alternate_Function_Enable(&_GPIO_MODULE_SPI3_PB345);
CEC1x02
// Enable SPI0
GPIO_Alternate_Function_Enable(&_GPIO_MODULE_SPI0_P153_P164_P054);
|
| Notes |
- This routine is available only for MCUs with alternative PORT functions.
- The predefined General Purpose Input/Output (GPIO) constants used by the library routines are stored in the separate source file.
|
__mE_Lib_GPIO
| Prototype |
char __mE_Lib_GPIO(unsigned long *port, char pin_mask, char dir, unsigned int config);
// for CEC1x02 and ST MCUs
char __mE_Lib_GPIO(unsigned long *port, unsigned long pin_mask, unsigned long config);
|
| Description |
The function is used for the internal use by compiler. It will configure pins according to the parameters passed.
|
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